GD32A5xx Series
Based on the Arm® Cortex®-M33 core with main frequency of up to 100MHz.
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Overview
The GD32A5xx series MCUs are based on the 100MHz Cortex®-M33 core, equipped with 384KB of Flash and 48KB of SRAM, along with a dedicated code space that can be configured as 64KB of DFlash or 4KB of EEPROM. The chip operates with a wide voltage supply range of 2.7-5.5V, supports an operating temperature range of -40°C to +125°C, and has a lifespan of over 15 years.
To enable diverse body control and connectivity applications, the GD32A5xx integrates various communication interfaces to enhance connectivity, supporting up to three USARTs, two I2Cs, two SPIs, one I2S, along with two CAN FD and three LIN interfaces. Based on application development needs, the newly added MFCOM component can be flexibly configured as USART/SPI/I2C/LIN interfaces, further increasing design flexibility.
The chip features one general-purpose 16-bit timer, two basic timers, and four advanced PWM timers. The internal 12-bit ADC offers a sampling rate of up to 1MSPS and includes high-precision analog peripherals such as a fast comparator and DAC to support automotive motor control.
The Flash/RAM in the GD32A5xx supports ECC verification, and data communication supports CRC verification. Additionally, the chip is equipped with voltage monitoring (BOR/PDR) and clock monitoring functions, providing hardware assurance for secure and stable system operation. With excellent electrostatic protection and anti-interference (ESD/EFT) capabilities, it meets the low failure rate and high reliability requirements essential for automotive electronics.
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Based on Cortex®-M33 core, up to 100MHz operating frequency.
Integrated 384KB Flash, 64KB DFlash/4KB EEPROM, 48KB SRAM.
Support 2.7V-5.5V power supply, -40~125℃ Grade1 temperature range.
Support start-up from main flash. -
Based on Cortex®-M33 core, up to 100MHz operating frequency.
Integrated 384KB Flash, 64KB DFlash/4KB EEPROM, 48KB SRAM.
Support 2.7V-5.5V power supply, -40~125℃ Grade1 temperature range.
Support start-up from main flash, bootloader, SRAM.
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20 Results
Part No
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Core
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Series
GD32A513
GD32A503
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Package
QFN32
LQFP64
LQFP48
LQFP100
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Max Speed (MHz)
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Flash (Bytes)
128K
256K
384K
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SRAM (Bytes)
24K
32K
48K
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I/O
up to 88
up to 57
up to 42
up to 27
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GPTM (32bit)
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GPTM (16bit)
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Advanced TM (16bit)
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HRTM
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Basic TM (64bit)
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Basic TM (32bit)
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Basic TM (16bit)
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LPTM (32bit)
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LPTM (16bit)
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SysTick (64bit)
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SysTick (24bit)
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WDG
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RTC
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USART+UART
1
2
3
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LPUART
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I2C
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QSPI
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SPI
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I2S
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CAN 2.0B
1xFD
2xFD
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USB 2.0
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Ethernet
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EtherCAT Slave Controller
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SDIO
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MFCOM
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LIN
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LCD-TFT
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Segment LCD
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Camera
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IPA
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SAI
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TMU
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EXMC
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CEC
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14bit ADC Units (CHs)
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12bit ADC Units (CHs)
2(32)
2(27)
2(20)
2(12)
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12bit DAC Units
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Comp
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IEEE 802.11
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Bluetooth
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Cortex®-M33 | GD32A513 | QFN32 | 100 | 128K | 24K | up to 27 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | 2 | 0 | 1 | 0 | 1xFD | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(12) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | QFN32 | 100 | 256K | 32K | up to 27 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | 2 | 0 | 1 | 0 | 1xFD | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(12) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP48 | 100 | 128K | 24K | up to 42 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(20) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP48 | 100 | 256K | 32K | up to 42 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(20) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP64 | 100 | 128K | 24K | up to 57 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP64 | 100 | 256K | 32K | up to 57 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP64 | 100 | 384K | 48K | up to 57 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP100 | 100 | 128K | 24K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP100 | 100 | 256K | 32K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A513 | LQFP100 | 100 | 384K | 48K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | QFN32 | 100 | 128K | 24K | up to 27 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | 2 | 0 | 1 | 0 | 1xFD | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(12) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | QFN32 | 100 | 256K | 32K | up to 27 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 1 | 0 | 2 | 0 | 1 | 0 | 1xFD | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(12) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP48 | 100 | 128K | 24K | up to 42 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(20) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP48 | 100 | 256K | 32K | up to 42 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 2 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(20) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP64 | 100 | 128K | 24K | up to 57 | 0 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP64 | 100 | 256K | 32K | up to 57 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP64 | 100 | 384K | 48K | up to 57 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(27) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP100 | 100 | 128K | 24K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP100 | 100 | 256K | 32K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 | |
Cortex®-M33 | GD32A503 | LQFP100 | 100 | 384K | 48K | up to 88 | 0 | 1 | 4 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3 | 0 | 2 | 0 | 2 | 1 | 2xFD | 0 | 0 | 0 | 0 | 1 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(32) | 1 | 1 | 0 | 0 |
Documentation
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Datasheet(2)
Title
EN
CN
Date
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2024-11-12
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2024-11-12
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User Manual(2)
Title
EN
CN
Date
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2024-11-26
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2024-11-26
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Errata(2)
Title
EN
CN
Date
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2024-10-16
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2024-10-16
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Application Note(22)
Title
EN
CN
Date
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2023-08-28
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2023-08-28
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2023-08-28
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2024-06-04
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2024-9-26
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-04-21
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2022-04-21
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2022-04-21
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2024-11-25
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