GD32E1x3 Series
Based on the Arm® Cortex® -M4 core with main frequency of up to 120MHz.
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Overview
The GD32E1x3 product series incorporates the Arm® Cortex®-M4 32-bit processor core operating at 120 MHz frequency with Flash access to obtain maximum efficiency. It provides up to 128 KB on-chip Flash memory and 32 KB SRAM memory. An extensive range of enhanced I/Os and peripherals are connected to two APB buses.
The GD32E1x3 product series operates from 1.71 to 3.6 V power supply and is available in the -40 to +85 °C temperature range for grade 6 devices, and the -40°C to +105°C temperature range for grade 7 devices. Several power-saving modes provide the flexibility for maximum optimization between wakeup latency and power consumption, an especially important consideration in low power applications.
These features make the GD32E1x3 product series suitable for a wide range of interconnection and advanced applications, especially in areas such as industrial control, motor drives, consumer and handheld equipment, human-machine interface, security and alarm systems, POS, automotive navigation, IoT and more.
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16 Results
Part No
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Core
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Series
GD32E113
GD32E103
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Package
QFN36
LQFP64
LQFP48
LQFP100
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Max Speed (MHz)
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Flash (Bytes)
64K
128K
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SRAM (Bytes)
20K
32K
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I/O
up to 80
up to 51
up to 37
up to 26
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GPTM (32bit)
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GPTM (16bit)
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Advanced TM (16bit)
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HRTM
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Basic TM (64bit)
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Basic TM (32bit)
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Basic TM (16bit)
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LPTM (32bit)
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LPTM (16bit)
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SysTick (64bit)
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SysTick (24bit)
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WDG
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RTC
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USART+UART
2+0
3+2
3+0
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LPUART
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I2C
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QSPI
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SPI
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I2S
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CAN 2.0B
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USB 2.0
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Ethernet
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EtherCAT Slave Controller
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SDIO
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MFCOM
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LIN
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LCD-TFT
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Segment LCD
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Camera
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IPA
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SAI
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TMU
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EXMC
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CEC
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14bit ADC Units (CHs)
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12bit ADC Units (CHs)
2(16)
2(10)
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12bit DAC Units
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Comp
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IEEE 802.11
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Bluetooth
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Cortex®-M4 | GD32E113 | QFN36 | 120 | 64K | 20K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | QFN36 | 120 | 128K | 32K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP48 | 120 | 64K | 20K | up to 37 | 0 | 10 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP48 | 120 | 128K | 32K | up to 37 | 0 | 10 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP64 | 120 | 64K | 20K | up to 51 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP64 | 120 | 128K | 32K | up to 51 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP100 | 120 | 64K | 20K | up to 80 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E113 | LQFP100 | 120 | 128K | 32K | up to 80 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | QFN36 | 120 | 64K | 20K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | QFN36 | 120 | 128K | 32K | up to 26 | 0 | 4 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 2+0 | 0 | 1 | 0 | 1 | 0 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP48 | 120 | 64K | 20K | up to 37 | 0 | 10 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP48 | 120 | 128K | 32K | up to 37 | 0 | 10 | 1 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+0 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(10) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP64 | 120 | 64K | 20K | up to 51 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP64 | 120 | 128K | 32K | up to 51 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP100 | 120 | 64K | 20K | up to 80 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 | |
Cortex®-M4 | GD32E103 | LQFP100 | 120 | 128K | 32K | up to 80 | 0 | 10 | 2 | 0 | 0 | 0 | 2 | 0 | 0 | 0 | 1 | 2 | 1 | 3+2 | 0 | 2 | 0 | 3 | 2 | 0 | FS OTG | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 2(16) | 2 | 0 | 0 | 0 |
Documentation
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Datasheet(2)
Title
EN
CN
Date
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2024-01-05
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2024-01-05
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User Manual(2)
Title
EN
CN
Date
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2024-01-13
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2024-01-13
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Application Note(23)
Title
EN
CN
Date
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2023-08-28
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2023-08-28
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2023-08-28
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2024-06-04
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2024-9-26
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2023-08-28
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-12-08
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2022-04-21
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2022-04-21
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2022-04-21
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2022-04-21
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